| QGPN | Description | SubFamily | Input Frequency (MHz) |
Output Frequency (MHz) |
Input Level | No. of Outputs | Output Level | VCC (V) |
VCC Out (V) |
Rating | Operating Temperature Range (C) |
Package Group |
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| CDC351 | 1-Line to 10-Line 3.3V Clock Driver with Tri-State Outputs | Single-Ended | 100 | 100 | LVTTL | 10 | LVTTL | 3.3 | Catalog | -40 to 85 0 to 70 |
SOIC SSOP |
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| CDCV304 | General Purpose and PCI-X 1:4 Clock Buffer | Single-Ended | 200 | 200 | LVTTL | 4 | LVTTL | 2.5 3.3 |
Catalog | -40 to 85 | TSSOP | |
| DS90LV110AT | 1 to 10 LVDS Data/Clock Distributor with Failsafe | Differential | 3.3 | -40 to 85 | TSSOP | |||||||
| CDCE18005 | 5/10 Outputs Clock Buffer with Divider | Differential Single-Ended Universal (programmable) |
1500 | 1500 | LVPECL | 5 | LVPECL | 3.3 | 3.3 | Catalog | -40 to 85 | VQFN |
| CDCLVP111-EP | 1:10 LVPECL Buffer with Selectable Input | Differential | 3500 | 3500 | CML LVDS LVPECL SSTL |
10 | LVPECL | 2.5 3.3 |
2.5 3.3 |
HiRel Enhanced Product | -55 to 125 | LQFP |
| CDCM1802 | Clock Buffer w/Programmable Divider, LVPECL I/O + addl LVCMOS output | Dividers Universal (programmable) |
800 | 800 | LVPECL | 1 | LVPECL LVCMOS |
3.3 | 3.3 | Catalog | -40 to 85 | QFN |
| DS90LV110T | 1 to 10 LVDS Data/Clock Distributor | Differential | 3.3 | -40 to 85 | TSSOP | |||||||
| LMH2180 | 75 MHz Dual Clock Buffer | Single-Ended | 78 | 78 | 2 | 2.5 3.3 5 |
Catalog | -40 to 85 | DSBGA WSON |
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| CDC318A | 1-Line To 18-Line Clock Driver With I2C Control Interface | Single-Ended | 100 | 100 | LVTTL | 18 | LVTTL TTL |
3.3 | Catalog | SSOP | ||
| CDC329A | 1-To-6 Clock Driver With Selectable Polarity | Single-Ended | 80 | 80 | TTL | 6 | CMOS | 5 | Catalog | SOIC | ||
| CDCLVC1110 | Low Jitter, 1:10 LVCMOS Fan-out Clock Buffer | Single-Ended | 250 | 250 | LVCMOS | 10 | LVCMOS | 2.5 3.3 |
Catalog | -40 to 85 | TSSOP | |
| CDCLVD110A | 1-to-10 LVDS Clock Buffer up to 1100MHz with Minimum Skew for Clock Distribution | Differential | 1100 | 1100 | LVDS | 10 | LVDS | 2.5 | 2.5 | Catalog | -40 to 85 | LQFP VQFN |
| CDCVF111 | 1:9 Differential LVPECL Clock Driver | Differential | 650 | 650 | LVPECL | 9 | LVPECL | 3.3 | 3.3 | Catalog | -40 to 85 | PLCC |
| CDCVF2310 | High Performance 1:10 Clock Buffer for General Purpose Applications | Single-Ended | 200 | 200 | LVTTL | 10 | LVTTL | 3.3 2.5 |
Catalog | -40 to 85 | TSSOP | |
| CDC2351-EP | Enhanced Product 1-Line To 10-Line Clock Driver With 3-State Outputs | Single-Ended | 100 | 100 | LVTTL | 10 | LVTTL | 3.3 | HiRel Enhanced Product | -55 to 125 | SSOP | |
| CDCLVC1310 | Universal input, 10 output low impedance LVCMOS Buffer | Single-Ended | 200 | 200 | HCSL LVCMOS LVDS LVPECL SSTL XTAL |
10 | LVCMOS | 1.5 1.8 2.5 2.8 |
Catalog | -40 to 85 | VQFN | |
| CDCLVD1213 | Low Jitter, 1:4 Universal-to-LVDS Buffer with Selectable Output Divider | Differential | 800 | 800 | LVCMOS LVDS LVPECL |
4 | LVDS | 2.5 | 2.5 | Catalog | -40 to 85 | QFN |
| CDCLVD2102 | Low Jitter, Dual 1:2 Universal-to-LVDS Buffer | Differential | 800 | 800 | LVCMOS LVDS LVPECL |
4 | LVDS | 2.5 | 2.5 | Catalog | -40 to 85 | QFN |
| CDC341 | 1-to-8 clock driver with tight AC specification | Single-Ended | 80 | 80 | TTL | 8 | TTL | 5 | Catalog | SOIC | ||
| CDCLVP1204 | Low Jitter, 2-Input Selectable 1:4 Universal-to-LVPECL Buffer | Differential | 2000 | 2000 | LVCMOS LVDS LVPECL |
4 | LVPECL | 2.5 3.3 |
2.5 3.3 |
Catalog | QFN | |
| CDCM1804 | 1:3 LVPECL Clock Buffer & Addl LVCMOS Output & Programmable Divider | Dividers Universal (programmable) |
800 | 800 | LVPECL | 3 | LVPECL 1-LVCMOS No of outputs = 3 LVPECL LVCMOS |
3.3 | 3.3 | Catalog | -40 to 85 | VQFN |
| LMK00101 | Ultra-low Jitter LVCMOS Fanout Buffer/Level Translator with Universal Input | Single-Ended | 200 | 200 | LVCMOS | 10 | LVCMOS | 3.3V 2.5V 1.8V 1.5V |
Catalog | -40 to 85 | WQFN | |
| LMK00304 | 3.1-GHz Differential Clock Buffer/Level Translator | Differential Universal (programmable) |
3100 | 3100 | LVPECL | 5 | LVPECL | 3.3 | 3.3 2.5 |
Catalog | -40 to 85 | WQFN |
| CDC2351-Q1 | Automotive 1-Line to 10-Line Clock Driver With 3-State Outputs | Single-Ended | 100 | 100 | LVTTL | 10 | LVTTL | 3.3 | Automotive | -40 to 125 | SSOP | |
| CDC339 | 1-To-8 (4 Same Frequency, 4 Divide-By-2) Clock Driver With Clear | Dividers Single-Ended |
80 | 80 | TTL | 8 | TTL | 5 | 5 | Catalog | SOIC SSOP |
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| CDCLVP2102 | Low Jitter, Dual 1:2 Universal-to-LVPECL Buffer | Differential | 2000 | 2000 | LVCMOS LVDS LVPECL |
4 | LVPECL | 2.5 3.3 |
2.5 3.3 |
Catalog | QFN | |
| CDCLVP2108 | Low Jitter, Dual 1:8 Universal-to-LVPECL Buffer | Differential | 2000 | 2000 | LVCMOS LVDS LVPECL |
16 | LVPECL | 2.5 3.3 |
2.5 3.3 |
Catalog | VQFN | |
| CDCP1803 | 1:3 LVPECL Clock Buffer with Programable Divider | Differential Dividers |
800 | 800 | LVPECL | 3 | LVPECL | 3.3 | 3.3 | Catalog | -40 to 85 | VQFN |
| CDCP1803-EP | Enhanced Product 1:3 LVPECL Clock Buffer With Programmable Divider | Differential Dividers |
800 | 800 | LVPECL | 3 | LVPECL | 3.3 | 3.3 | Military | -55 to 125 | VQFN |
| LMH2190 | Quad Channel 27 MHz Clock Tree Driver with I2C Interface | Single-Ended | 27 | 27 | SINE / SQUARE | 4 | SQUARE | 1.8 | Catalog | -20 to 85 | DSBGA | |
| CDC391 | 1-To-6 Clock Driver With Selectable Polarity | Single-Ended | 100 | 100 | TTL | 6 | TTL | 5 | Catalog | SOIC | ||
| CDCLVD2108 | Low Jitter, Dual 1:8 Universal-to-LVDS Buffer | Differential | 800 | 800 | LVCMOS LVDS LVPECL |
16 | LVDS | 2.5 | 2.5 | Catalog | -40 to 85 | VQFN |
| CDCLVP215 | Dual 1:5 High Speed LVPECL Fan Out Buffer | Differential | 3500 | 3500 | LVPECL | 10 | LVPECL | 2.5 3.3 |
2.5 3.3 |
Catalog | -40 to 85 | VQFN |
| CDCV304-EP | Enhanced Product General Purpose and PCI-X 1:4 Clock Buffer | Single-Ended | 200 | 200 | LVTTL | 4 | LVTTL | 2.5 3.3 |
HiRel Enhanced Product | -40 to 105 | TSSOP | |
| CDCVF310 | High Performance 1:10 Clock Buffer for General Purpose Applications | Single-Ended | 200 | 200 | LVTTL | 10 | LVTTL | 2.5 3.3 |
Catalog | -40 to 85 | TSSOP | |
| DS10BR254 | 1.5 Gbps 1:4 LVDS Repeater | Differential | 3.3 | -40 to 85 | WQFN | |||||||
| CDC337 | 1-To-8 (4 Same Frequency, 4 Divide-By-2) Clock Driver With Clear | Dividers Single-Ended |
80 | 80 | TTL | 8 | CMOS | 5 | 5 | Catalog | SOIC | |
| CDCL1810A | 1.8V 1-to-10 High Performance Differential Clock Buffer with Individual Output Enable/Disable | Dividers | 650 | 650 | LVDS | 10 | CML | 1.8 | 1.8 | Catalog | -40 to 85 | VQFN |
| CDCLVD1216 | Low Jitter, 2-Input Selectable 1:16 Universal-to-LVDS Buffer | Differential | 800 | 800 | LVCMOS LVDS LVPECL |
16 | LVDS | 2.5 | 2.5 | Catalog | -40 to 85 | VQFN |
| CDCLVP1102 | Low Jitter 1:2 Universal-to-LVPECL Buffer | Differential | 2000 | 2000 | LVCMOS LVDS LVPECL |
2 | LVPECL | 2.5 3.3 |
2.5 3.3 |
Catalog | -40 to 85 | QFN |
| CDC111 | 3.3V LVPECL Differential Clock Driver | Differential | 500 | 500 | LVPECL | 9 | LVPECL | 3.3 | 3.3 | Catalog | PLCC | |
| CDCL1810 | 1.8V 1-to-10 High Performance Differential Clock Buffer | Differential Dividers Universal (programmable) |
650 | 650 | LVDS | 10 | CML | 1.8 | 1.8 | Catalog | -40 to 85 | VQFN |
| CDCLVD2104 | Low Jitter, Dual 1:4 Universal-to-LVDS Buffer | Differential | 800 | 800 | LVCMOS LVDS LVPECL |
8 | LVDS | 2.5 | 2.5 | Catalog | -40 to 85 | VQFN |
| CDCLVP1216 | Low Jitter, 2-Input Selectable 1:16 Universal-to-LVPECL Buffer | Differential | 2000 | 2000 | LVCMOS LVDS LVPECL |
16 | LVPECL | 2.5 3.3 |
2.5 3.3 |
Catalog | -40 to 85 | VQFN |
| CDC1104 | 1 to 4 Configurable Low Frequency Clock Buffer for 3D Displays | Single-Ended | 0.00024 | 0.00012 | TTL | 4 | TTL | 3.8 - 5 | Catalog | -40 to 85 | WQFN | |
| CDC319 | 1-Line to 10-Line Clock Driver with I2C Control Interface | Single-Ended | 100 | 100 | LVTTL | 10 | LVTTL TTL |
3.3 | Catalog | 0 to 70 | SSOP | |
| CDCVF2310-EP | Enhanced Product 2.5-V to 3.3-V High Performance Clock Buffer | Single-Ended | 200 | 200 | LVTTL | 10 | LVTTL | 2.5 3.3 |
Military | -55 to 125 | TSSOP | |
| CDC328A | 1-To-6 Clock Driver With Selectable Polarity | Single-Ended | 100 | 100 | TTL | 6 | TTL | 5 | Catalog | SOIC SSOP |
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| CDC3RL02 | Dual-Channel Square/Sine-to-Square Wave Clock Buffer | Single-Ended | 52 | 52 | SINE / SQUARE | 2 | SQUARE | 1.8 | Catalog | -40 to 85 | DSBGA | |
| CDCLVC1112 | Low Jitter, 1:12 LVCMOS Fan-out Clock Buffer | Single-Ended | 250 | 250 | LVCMOS | 12 | LVCMOS | 2.5 3.3 |
Catalog | -40 to 85 | TSSOP | |
| CDCLVP110 | 1:10 LVPECL/HSTL to LVPECL Clock Driver | Differential | 3500 | 3500 | HSTL LVPECL |
10 | LVPECL | 2.5 3.3 |
2.5 3.3 |
Catalog | -40 to 85 | LQFP |
| LMK00105 | Ultra-low Jitter LVCMOS Fanout Buffer/Level Translator with Universal Input | Single-Ended | 200 | 200 | LVCMOS | 5 | LVCMOS | 3.3V 2.5V 1.8V 1.5V |
Catalog | -40 to 85 | WQFN | |
| CDC203 | 3.3V 6-Bit Inverter/Clock Driver | Single-Ended | 40 | 40 | CMOS | 6 | CMOS | 3.3 | Catalog | SOIC | ||
| CDCLVP2106 | Low Jitter, Dual 1:6 Universal-to-LVPECL Buffer | Differential | 2000 | 2000 | LVCMOS LVDS LVPECL |
12 | LVPECL | 2.5 3.3 |
2.5 3.3 |
Catalog | VQFN | |
| LMK00306 | 3.1-GHz Differential Clock Buffer/Level Translator | Universal (programmable) | 3100 | LVPECL LVDS CML SSTL HSTL HCSL LVCMOS LVTTL XTAL |
7 | HCSL LVCMOS LVDS LVPECL |
3.3 | 2.5 3.3 |
-40 to 85 | WQFN | ||
| CDC208 | 5V Dual 1-to-4 clock driver | Single-Ended | 60 | 60 | TTL | 8 | CMOS | 5 | Catalog | -40 to 85 | SO SOIC |
|
| CDC340 | 1-to-8 clock driver with tight AC specification | Single-Ended | 80 | 80 | TTL | 8 | TTL | 5 | Catalog | SOIC | ||
| CDCLVD1204 | Low Jitter, 2-Input Selectable 1:4 Universal-to-LVDS Buffer | Differential | 800 | 800 | LVCMOS LVDS LVPECL |
4 | LVDS | 2.5 | 2.5 | Catalog | -40 to 85 | QFN |
| CDCLVP111 | 1:10 LVPECL Buffer with Selectable Input | Differential | 3500 | 3500 | CML LVDS LVPECL SSTL |
10 | LVPECL | 2.5 3.3 |
2.5 3.3 |
Catalog | -40 to 85 | LQFP VQFN |
| CDCUN1208LP | Ultra Low Power, 2:8 Fan-out Buffer with Universal Inputs and Outputs | Differential Dividers Single-Ended Universal (programmable) |
400 | 400 | HCSL | 8 | HCSL LVDS LVCMOS |
1.8 2.5 3.3 |
1.8 2.5 3.3 |
Catalog | -40 to 85 | VQFN |
| LMK00301 | 3-GHz, 10-Output Differential Fanout Buffer / Level Translator | Differential Universal (programmable) |
3100 | 3100 | HCSL LVDS LVPECL |
11 | HCSL LVDS LVPECL |
3.3 | 3.3 2.5 |
Catalog | -40 to 85 | WQFN |
| CDCLVC1106 | Low Jitter, 1:6 LVCMOS Fan-out Clock Buffer | Single-Ended | 250 | 250 | LVCMOS | 6 | LVCMOS | 2.5 3.3 |
Catalog | -40 to 85 | TSSOP | |
| CDCLVD2106 | Low Jitter, Dual 1:6 Universal-to-LVDS Buffer | Differential | 800 | 800 | LVCMOS LVDS LVPECL |
12 | LVDS | 2.5 | 2.5 | Catalog | -40 to 85 | VQFN |
| CDCLVP1212 | Low Jitter, 2-Input Selectable 1:12 Universal-to-LVPECL Buffer | Differential | 2000 | 2000 | LVCMOS LVDS LVPECL |
12 | LVPECL | 2.5 3.3 |
2.5 3.3 |
Catalog | VQFN | |
| LMH2191 | Dual Channel 52 MHz Clock Tree Driver | Single-Ended | 52 | 52 | SINE / SQUARE | 4 | SQUARE | 1.8 | Catalog | -40 to 85 | DSBGA | |
| CDCLVC1102 | Low Jitter, 1:2 LVCMOS Fan-out Clock Buffer | Single-Ended | 250 | 250 | LVCMOS | 2 | LVCMOS | 2.5 3.3 |
Catalog | -40 to 85 | TSSOP | |
| CDCLVC1103 | Low Jitter, 1:3 LVCMOS Fan-out Clock Buffer | Single-Ended | 250 | 250 | LVCMOS | 3 | LVCMOS | 2.5 3.3 |
Catalog | -40 to 85 | TSSOP | |
| CDCLVC1104 | Low Jitter, 1:4 LVCMOS Fan-out Clock Buffer | Single-Ended | 250 | 250 | LVCMOS | 4 | LVCMOS | 2.5 3.3 |
Catalog | -40 to 85 | TSSOP | |
| CDCLVC1108 | Low Jitter, 1:8 LVCMOS Fan-out Clock Buffer | Single-Ended | 250 | 250 | LVCMOS | 8 | LVCMOS | 2.5 3.3 |
Catalog | -40 to 85 | TSSOP | |
| CDCLVD1208 | Low Jitter, 2-Input Selectable 1:8 Universal-to-LVDS Buffer | Differential | 800 | 800 | LVCMOS LVDS LVPECL |
8 | LVDS | 2.5 | 2.5 | Catalog | -40 to 85 | VQFN |
| CDCLVD1212 | Low Jitter, 2-Input Selectable 1:12 Universal-to-LVDS Buffer | Differential | 800 | 800 | LVCMOS LVDS LVPECL |
12 | LVDS | 2.5 | 2.5 | Catalog | -40 to 85 | VQFN |
| CDC204 | 5V 6-Bit Inverter / Clock Driver | Single-Ended | 80 | 80 | CMOS | 6 | CMOS | 5 | Catalog | SOIC | ||
| CDC2351 | 1-Line to 10-Line Clock Driver With 3-State Outputs | Single-Ended | 100 | 100 | LVTTL | 10 | LVTTL | 3.3 | Catalog | 0 to 70 | SOIC SSOP |
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| CDC3S04 | Quad Sine-Wave Clock Buffer with LDO | Single-Ended | 52 | 52 | SINE | 4 | SINE | 1.8 | Catalog | -40 to 85 | DSBGA | |
| CDCLVP1208 | Low Jitter, 2-Input Selectable 1:8 Universal-to-LVPECL Buffer | Differential | 2000 | 2000 | LVCMOS LVDS LVPECL |
8 | LVPECL | 2.5, 3.3 |
2.5 3.3 |
Catalog | VQFN | |
| CDCLVP2104 | Low Jitter, Dual 1:4 Universal-to-LVPECL Buffer | Differential | 2000 | 2000 | LVCMOS LVDS LVPECL |
8 | LVPECL | 2.5 3.3 |
2.5 3.3 |
Catalog | VQFN | |
| DS92CK16 | 3V BLVDS 1 to 6 Clock Buffer/Bus Transceiver | Differential | 125 | 125 | LVDS LVTTL |
6 | LVCMOS | 3.3 | 3.3 | Catalog | -40 to 85 | TSSOP |
| LMK01000 | 1.6 GHz High Performance Clock Buffer, Divider, and Distributor | Differential Dividers |
1600 | 1600 | LVDS | 8 | LVDS LVPECL |
3.3 | 3.3 | Catalog | -40 to 85 | WQFN |
| LMK00725 | Low Skew, 1-to-5, Differential-to-3.3V LVPECL Fanout Buffer | Differential | 650 | 650 | HCSL LVCMOS LVDS LVPECL LVTTL SSTL |
5 | LVPECL | 3.3 | 3.3 | Catalog | -40 to 85 | TSSOP |
| LMK01010 | 1.6 GHz High Performance Clock Buffer, Divider, and Distributor | Differential Dividers |
1600 | 1600 | LVDS | 8 | LVDS | 3.3 | 3.3 | Catalog | -40 to 85 | WQFN |
| LMK00334 | LMK00334 4-Output PCIe Gen1/Gen2/Gen3 Clock Buffer/Level Translator | Differential | 400 | 400 | CML HCSL HSTL LVCMOS LVDS LVPECL SSTL XTAL |
4 | HCSL | 3.3 | 2.5 3.3 |
Catalog | -40 to 85 | WQFN |
| LMK00804B | Low Skew, 1-to-4 Multiplexed Differential/LVCMOS-to-LVCMOS/TTL Fanout Buffer | Single-Ended | 350 | 350 | HCSL LVCMOS LVDS LVPECL LVTTL |
4 | LVCMOS LVTTL |
3.3V, 2.5V, 1.8V, 1.5V | Catalog | -40 to 85 | TSSOP | |
| LMK00338 | LMK00338 8-Output PCIe Gen1/2/3 Clock Buffer/Level Translator | Differential | 400 | 400 | CML HCSL HSTL LVCMOS LVDS LVPECL LVTTL SSTL XTAL |
8 | HCSL LVCMOS |
3.3 | 2.5 3.3 |
Catalog | -40 to 85 | WQFN |
| LMK01020 | 1.6 GHz High Performance Clock Buffer, Divider, and Distributor | Differential Dividers |
1600 | 1600 | LVDS | 8 | LVPECL | 3.3 | 3.3 | Catalog | -40 to 85 | WQFN |
| SN65MLVD128 | 1:8 LVTTL to M-LVDS Repeater | Differential | Catalog | -40 to 85 | TSSOP | |||||||
| SN65EL11 | PECL/ECL 1:2 Fanout Buffer | Differential | -40 to 85 | SOIC VSSOP |
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| LMK00308 | 3.1-GHz Differential Clock Buffer/Level Translator | Universal (programmable) | 3100 | LVPECL LVDS CML SSTL HSTL HCSL LVCMOS LVTTL XTAL |
9 | HCSL LVCMOS LVDS LVPECL |
3.3 | 2.5 3.3 |
-40 to 85 | WQFN | ||
| SN65LVDS108 | 1:8 LVDS Clock Fanout Buffer | Differential | 400 | 400 | LVDS | 8 | LVDS | 3.3 | 3.3 | Catalog | -40 to 85 | TSSOP |
| SN65LVDS104 | 1:4 LVDS Clock Fanout Buffer | Differential | 400 | 400 | LVDS | 4 | LVDS | 3.3 | 3.3 | Catalog | -40 to 85 | SOIC TSSOP |
| SN65LVEP11 | PECL/ECL 1:2 Fanout Buffer | Differential | -40 to 85 | SOIC VSSOP |
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| LMV112 | 40 MHz Dual Clock Buffer | Single-Ended | 40 | 40 | rail to rail | 2 | rail to rail | 2.5 3.3 5 |
Catalog | -40 to 85 | WSON | |
| LMK01801 | LMK01801 Dual Clock Distribution | Dividers | 3100 | 3100 | LVDS | 12 | LVPECL LVDS and LVCMOS |
3.3 | 3.3 | Catalog | -40 to 85 | WQFN |
| SN65LVDS105 | 1 LVTTL:4 LVDS Clock Fanout Buffer | Differential | 400 | 400 | LVTTL | 4 | LVDS | 3.3 | 3.3 | Catalog | -40 to 85 | SOIC TSSOP |
| SN65LVEL11 | 3.3V PECL 1:2 Fanout Buffer | Differential | -40 to 85 | SOIC VSSOP |
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| SN65LVDS116 | 1:16 LVDS Clock Fanout Buffer | Differential | 400 | 400 | LVDS | 16 | LVDS | 3.3 | 3.3 | Catalog | -40 to 85 | TSSOP |
